Time-interleaved Analog-to-Digital Converters (TIADCs) have received considerable attention in the recent past for applications that require very high sample rates, i.e., sample rates that cannot be provided by a single Analog to Digital Converter (ADC). In a TIADC system, a faster ADC is obtained by combining two or more slower ADCs operating in parallel. Ideally, the slower ADCs should each have the same offset, the same gain, and the same uniform sample instants. In practice, however, due to fabrication errors, component mismatches, temperature variations, mechanical strain, environmental perturbations, etc., this requirement is difficult to achieve. The resulting errors degrade the performance of the TIADC system, thus making the estimation and correction of these errors imperative to improve performance.
Various TIADC interleave error correction techniques are known.
For example, U.S. Pat. No. 7,525,462 describes techniques for gain control in an interleaved analog-to-digital converter that specifically is for performing dispersion compensation on an electromagnetic signal. A coarse programmable gain amplifier (PGA) controller is configured to characterize the output digital signal of each of the analog-to-digital converters and to output a coarse gain control signal based thereon. A coarse programmable gain amplifier receives the coarse gain control signal and amplifies the input analog signal based thereon and outputs an amplified signal. A splitter is configured to divide the amplified signal into a plurality of amplified signals; and a fine PGA controller is configured to determine a fine gain adjustment for each of the plurality of interleaved analog-to-digital converters. A plurality of fine programmable gain amplifiers are provided, each corresponding to one of the plurality of interleaved analog-to-digital converters, and each configured to receive one of the plurality of amplified signals and a fine gain control signal and output an individually-amplified signal to a corresponding one of the interleaved analog-to-digital converters.
U.S. Patent Publication 2009/0021412 describes a method for operating a time-interleaved analog-to-digital converter that comprises an array of M sub ADCs (ADC1, ADC2, . . . , ADCM), where M is an even integer, and each row of the array comprises one of the M sub ADCs. For every sampling instant n, where n is an integer in a sequence of integers, the converter converts the analog input by means of the sub ADC in selected row k(n) of the array, wherein the specific sub ADC is selected according to an algorithm that changes according to a sample index number.